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182 lines
6.6 KiB
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<TITLE>ca65 Users Guide: Input format</TITLE>
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<LINK HREF="ca65-4.html" REL=next>
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<LINK HREF="ca65.html#toc3" REL=contents>
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<A HREF="ca65-4.html">Next</A>
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<A HREF="ca65.html#toc3">Contents</A>
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<HR>
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<H2><A NAME="s3">3.</A> <A HREF="ca65.html#toc3">Input format</A></H2>
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<H2><A NAME="ss3.1">3.1</A> <A HREF="ca65.html#toc3.1">Assembler syntax</A>
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</H2>
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<P>The assembler accepts the standard 6502/65816 assembler syntax. One line may
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contain a label (which is identified by a colon), and, in addition to the
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label, an assembler mnemonic, a macro, or a control command (see section
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<A HREF="ca65-10.html#control-commands">Control Commands</A> for supported control
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commands). Alternatively, the line may contain a symbol definition using
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the '=' token. Everything after a semicolon is handled as a comment (that is,
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it is ignored).</P>
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<P>Here are some examples for valid input lines:</P>
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<P>
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<BLOCKQUOTE><CODE>
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<PRE>
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Label: ; A label and a comment
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lda #$20 ; A 6502 instruction plus comment
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L1: ldx #$20 ; Same with label
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L2: .byte "Hello world" ; Label plus control command
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mymac $20 ; Macro expansion
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MySym = 3*L1 ; Symbol definition
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MaSym = Label ; Another symbol
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</PRE>
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</CODE></BLOCKQUOTE>
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</P>
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<P>The assembler accepts</P>
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<P>
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<UL>
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<LI>all valid 6502 mnemonics when in 6502 mode (the default or after the
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<CODE>
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<A HREF="ca65-10.html#.P02">.P02</A></CODE> command was given).</LI>
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<LI>all valid 6502 mnemonics plus a set of illegal instructions when in
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<A HREF="#6502X-mode">6502X mode</A>.</LI>
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<LI>all valid 65SC02 mnemonics when in 65SC02 mode (after the
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<CODE>
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<A HREF="ca65-10.html#.PSC02">.PSC02</A></CODE> command was given).</LI>
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<LI>all valid 65C02 mnemonics when in 65C02 mode (after the
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<CODE>
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<A HREF="ca65-10.html#.PC02">.PC02</A></CODE> command was given).</LI>
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<LI>all valid 65618 mnemonics when in 65816 mode (after the
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<CODE>
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<A HREF="ca65-10.html#.P816">.P816</A></CODE> command was given).</LI>
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<LI>all valid SunPlus mnemonics when in SunPlus mode (after the
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<CODE>
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<A HREF="ca65-10.html#.SUNPLUS">.SUNPLUS</A></CODE> command was given).</LI>
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</UL>
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</P>
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<H2><A NAME="ss3.2">3.2</A> <A HREF="ca65.html#toc3.2">65816 mode</A>
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</H2>
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<P>In 65816 mode several aliases are accepted in addition to the official
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mnemonics:</P>
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<P>
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<BLOCKQUOTE><CODE>
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<PRE>
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BGE is an alias for BCS
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BLT is an alias for BCC
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CPA is an alias for CMP
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DEA is an alias for DEC A
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INA is an alias for INC A
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SWA is an alias for XBA
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TAD is an alias for TCD
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TAS is an alias for TCS
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TDA is an alias for TDC
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TSA is an alias for TSC
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</PRE>
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</CODE></BLOCKQUOTE>
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</P>
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<H2><A NAME="6502X-mode"></A> <A NAME="ss3.3">3.3</A> <A HREF="ca65.html#toc3.3">6502X mode</A>
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</H2>
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<P>6502X mode is an extension to the normal 6502 mode. In this mode, several
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mnemonics for illegal instructions of the NMOS 6502 CPUs are accepted. Since
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these instructions are illegal, there are no official mnemonics for them. The
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unofficial ones are taken from
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<A HREF="http://oxyron.net/graham/opcodes02.html">http://oxyron.net/graham/opcodes02.html</A>. Please note that only the
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ones marked as "stable" are supported. The following table uses information
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from the mentioned web page, for more information, see there.</P>
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<P>
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<UL>
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<LI><CODE>ALR: A:=(A and #{imm})*2;</CODE></LI>
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<LI><CODE>ANC: A:=A and #{imm};</CODE> Generates opcode $0B.</LI>
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<LI><CODE>ARR: A:=(A and #{imm})/2;</CODE></LI>
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<LI><CODE>AXS: X:=A and X-#{imm};</CODE></LI>
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<LI><CODE>DCP: {adr}:={adr}-1; A-{adr};</CODE></LI>
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<LI><CODE>ISC: {adr}:={adr}+1; A:=A-{adr};</CODE></LI>
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<LI><CODE>LAS: A,X,S:={adr} and S;</CODE></LI>
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<LI><CODE>LAX: A,X:={adr};</CODE></LI>
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<LI><CODE>RLA: {adr}:={adr}rol; A:=A and {adr};</CODE></LI>
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<LI><CODE>RRA: {adr}:={adr}ror; A:=A adc {adr};</CODE></LI>
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<LI><CODE>SAX: {adr}:=A and X;</CODE></LI>
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<LI><CODE>SLO: {adr}:={adr}*2; A:=A or {adr};</CODE></LI>
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<LI><CODE>SRE: {adr}:={adr}/2; A:=A xor {adr};</CODE></LI>
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</UL>
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</P>
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<H2><A NAME="sweet16-mode"></A> <A NAME="ss3.4">3.4</A> <A HREF="ca65.html#toc3.4">sweet16 mode</A>
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</H2>
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<P>SWEET 16 is an interpreter for a pseudo 16 bit CPU written by Steve Wozniak
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for the Apple ][ machines. It is available in the Apple ][ ROM. ca65 can
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generate code for this pseudo CPU when switched into sweet16 mode. The
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following is special in sweet16 mode:</P>
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<P>
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<UL>
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<LI>The '@' character denotes indirect addressing and is no longer available
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for cheap local labels. If you need cheap local labels, you will have to
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switch to another lead character using the <CODE>
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<A HREF="ca65-10.html#.LOCALCHAR">.LOCALCHAR</A></CODE> command.
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</LI>
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<LI>Registers are specified using <CODE>R0</CODE> .. <CODE>R15</CODE>. In sweet16 mode,
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these identifiers are reserved words.
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</LI>
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</UL>
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</P>
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<P>Please note that the assembler does neither supply the interpreter needed for
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SWEET 16 code, nor the zero page locations needed for the SWEET 16 registers,
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nor does it call the interpreter. All this must be done by your program. Apple
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][ programmers do probably know how to use sweet16 mode.</P>
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<P>For more information about SWEET 16, see
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<A HREF="http://www.6502.org/source/interpreters/sweet16.htm">http://www.6502.org/source/interpreters/sweet16.htm</A>.</P>
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<H2><A NAME="ss3.5">3.5</A> <A HREF="ca65.html#toc3.5">Number format</A>
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</H2>
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<P>For literal values, the assembler accepts the widely used number formats: A
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preceding '$' or a trailing 'h' denotes a hex value, a preceding '%'
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denotes a binary value, and a bare number is interpreted as a decimal. There
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are currently no octal values and no floats.</P>
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<H2><A NAME="ss3.6">3.6</A> <A HREF="ca65.html#toc3.6">Conditional assembly</A>
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</H2>
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<P>Please note that when using the conditional directives (<CODE>.IF</CODE> and friends),
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the input must consist of valid assembler tokens, even in <CODE>.IF</CODE> branches
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that are not assembled. The reason for this behaviour is that the assembler
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must still be able to detect the ending tokens (like <CODE>.ENDIF</CODE>), so
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conversion of the input stream into tokens still takes place. As a consequence
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conditional assembly directives may <B>not</B> be used to prevent normal text
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(used as a comment or similar) from being assembled. </P>
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<HR>
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